RESEARCH ON MEMRISTIVE- AND MEMCAPACITIVE-BASED GATE-LESS MEMORY ARRAYS

Abstract

In this work, we explore the properties of one of the relatively new devices, the mem- ristors, which act as memory resistors and are considered the fourth fundamental circuit element along with resistors, capacitors and inductors. Memristors have resistance switch- ing property and can preserve their state in the absence of applied signal. This makes them candidates for use in memories, logic circuits, reactance-less oscillators, neural networks and many more useful applications. We also explore the extended class of memcapaci- tors and meminductors which are also the memory analogues of capacitors and inductors respectively. They are part of the more general class of higher-order elements and the even wider class of fractional-order elements. We investigate the use of these devices as memory cells in gate-less crossbar memory arrays and how the goals of the International Technology Roadmap for Semiconductors (ITRS) can be achieved. The goal of the ITRS in memories is to achieve high speed, high density and low power consuming memory arrays. Researches are done on the new emerging devices, which contains the discussed memelements, to be used as a possible replacement for CMOS technology due to the pre- diction of its scaling limitation and the end of the distinguished Moore’s law. Gate-less memory arrays are arrays that do not use selector devices, as diodes or transistors, to se- lect the desired cell which aims to save the cost of the additional area used for selector devices to make more dense arrays. We focus on the sneak paths problem that faces the gate-less arrays and how to overcome them. Sneak paths are the undesired paths pass- ing through the unselected devices due to the absence of selector devices that prevents current from passing through the unselected devices but can be got rid of them by using some tricky readout techniques. We analyze one of the most advantageous methods for reading data from gate-less memristive arrays that uses three measurements and doing arithmetic to extract the cell information and cancel out the sneak paths effect mathemat- ically and show how this method can be generalized for all memelements, and edited to suppress the effect of the coupling capacitance between the bars used as selection lines. We also analyze the threshold used for detection of the binary data extracted from the array, how it can be optimized to withstand maximum deviation of the array binary data distribution among cells from the uniform distribution, and how this threshold can be made adaptive to the array cells’ distribution. We last show a reading technique that uses a single-measurement to extract data without arithmetic operations as well as suppress- ing sneak paths which has advantage over the discussed technique in terms of speed and noise margin. Finally, we offer new theoretical approaches for future work to overcome the effect of the bar resistance on the extracted information from the array by modeling

the array as a communication channel and using communication techniques to overcome the distortion of the information sent through it.