Analog-to-Digital Converter for Wireless Sensor Network Applications

Abstract

The realization of wireless sensor networks (WSN) put stringent requirements on its different building blocks. Among different blocks, the analog-to-digital converter (ADC) design proves to affect the overall system performance, especially in systems employing complex digital signal processing (DSP) algorithms. Static offset, clock jitter, signal-to-noise ratio (SNR), and system linearity are examples of different system specifications that directly impact the ADC design. In this thesis, the main focus is the design of an ADC for WSN application, implemented in CMOS technology. The thesis is divided into six chapters including lists of contents, tables and figures as well as list of references and the appendices. Chapter 1 Chapter 1 introduces the main motivations beyond digital domain processing and the driving factors. A brief outline of various ADC applications is presented with major focus on wireless sensor networks harassed for biomedical applications such as ECG signals monitoring. The chapter ends by clearly identifying the main challenges imposed on ADC design in such systems regarding power and area requirements, clearly identifying the proper context of this work.