A Low-Power High-Speed ADC-Based Equalizer for Serial Links

Mostafa Mahmoud Ayesh;

Abstract


The thesis is divided into six chapters including lists of contents, tables, and figures as well as a list of references.

Chapter 1

This chapter is an introduction including the motivation for this work, followed by the thesis outline.

Chapter 2

This chapter includes the literature survey for the analog and digital wireline receivers, and the literature survey for the high-speed ADCs.

Chapter 3

It describes the charge-steering concept, the circuit level of the proposed comparator, the proposed ADC and the overall system of the digital receiver.

Chapter 4

The chapter shows the system level and circuit level simulations. This chapter includes different results for schematics, post-layout simulations, and layouts.

Chapter 5

This chapter discusses the concept of equalization and the different types of equalization. It also provides a literature review for the equalizers and shows the designed DTLE along with its simulation results.

Chapter 6


Other data

Title A Low-Power High-Speed ADC-Based Equalizer for Serial Links
Other Titles معادل الوصلات المتوالية القائم على المحول التناظرى الرقمى منخفض الاستهلاك و عالى السرعة
Authors Mostafa Mahmoud Ayesh
Issue Date 2017

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