DESIGN OF FREQUENCY BASED ANALOG TO DIGITAL CONVERTER (FADC): NEW DESIGN METHODOLOGY FOR VOLTAGE-TO-FREQUENCY-CONVERTER (VFC) CIRCUITS

Abstract

Analog to digital converter (ADC) is a very important part in the mixed analog/digital systems since it acts as the interface between the external world (analog world) and the computer world (digital world). Designers are now trying to move towards the digital world where they make use of technology scaling in terms of area and gate delay, to be able to implement more complex applications; this approach leads to what is called software defined radio (SDR). Software defined radio (SDR) concept is very important nowadays; where it is a radio communication system where components that are typically implemented in hardware (i.e. filters, amplifiers, modulators / demodulators, detectors, etc.) are implemented in software instead. A basic SDR system consists of a digital processing module equipped with analog to digital converter (ADC) proceeded by some of RF front end. The ultimate objective receiver design would be to connect an ADC to an antenna directly. A digital signal processing (DSP) module reads the converter, and then the software converts the obtained data stream from the ADC to the suitable format that will be used by the application. According to the application requirements, designers can choose which type of ADCs is suitable for their application. Flash ADC, successive approximation ADC, Sigma delta ADC, pipelined ADC, and dual slope ADC are some types of conventional ADCs. This ideal scheme is not reachable due to the actual technology limits, because the decrease in the voltage supply as a result of technology scaling results in difficulty in designing the conventional ADCs. With technology scaling; the decrease in the supply voltage is much higher than the CMOS threshold voltage. This makes the transistors cascading more difficult; therefore if we can convert the voltage to an intermediate form (time or frequency) and then convert it to digital, we use the benefits of the technology scaling to design the time-based ADC. In this thesis; a comparative study between the two circuits (i.e., voltage to time converter (VTC) circuit and voltage to frequency converter (VFC) circuit) is introduced with respect to the sensitivity, linearity error, dynamic range, ENOB, SNDR, and maximum input frequency. It shows that VFC is better than VTC with respect to maximum input frequency, ENOB, SNDR, sensitivity and linearity error; however it consumes more power than VTC. A new design methodology is introduced for voltage to frequency converter circuit enhancing the sensitivity, linearity error, maximum input frequency, dynamic range, ENOB, and SNDR at the expense of area and power.