Memristor Modeling And its Applications in Digital Circuits

Abstract

This thesis aims to analyze and design different on-chip memristor based nonvolatile resistive random-access memory (RRAM) macros. Several memristor RRAM cells and architectures are proposed that allow for single bit and multiple-bit per cell storage. The thesis starts by proposing several proposed memristor models. These models were later tailored to be used in designing a complete 8x32 SRAM macro using a proposed RRAM cell consisting of two back-to-back memristors and one access MOSFET. This 1T2M cell has a high advantage over traditional 6T SRAM cells in terms of area and power dissipation, allowing for denser memories on the same area. As memristors are nonvolatile devices, their states remain unchanged even if the supply is disconnected. This gives a strong edge for memristor cells over conventional 6T CMOS SRAM cells that require a retention supply to maintain its stored data. Another RRAM architecture is proposed that allows the same 1T2M RRAM cell to be used for multi-bit storage, allowing for denser power efficient on-chip memories.