HARDWARE/SOFTWARE CO-VERIFICATION USING SYSTEM

Abstract

With EDA industry moving to integrating microprocessors, memory and ASICs into a single chip to form System on Chip (SoC). Detailed system specification that closely simulates the target system becomes a necessity to detect system bugs at early stages of development and hardware/software co-verification becomes the enabler to merge between the software and hardware of the system design. In this thesis, we focus on using SystemC, a new modeling methodology based on C++, to describe both hardware and software of an entire system throughout the design flow. Using this melhmlolo :,')', we model a priority-based preemptive real time operating system (RTOS) kernel. Then, we develop a co-verification lechni(jUe, to verify the interaction of the embedded software consisting of the RTOS kernel and the running application tasks with a hardware module representing a bus functional model (BFM) of a generic microcontroller with its associated hardware peripherals. For tlus thesis, we show that using SystemC to model all parts of the system provides great flexibility and enables faster co-simulation compared to existing methodologies.