Generalized Approach for Automatic Analog Layout
Soha Sherif Samir Hamed;
Abstract
The thesis is divided into six chapters including lists of contents, tables and figures as well as list of references.
Chapter 1
This chapter is an introduction explaining the need for layout automation tools and the outline of this thesis.
Chapter 2
This chapter includes a survey of the latest layout automation tools, mismatch sources affecting layout design, current mirror systematic mismatch modelling, and finally the STI evaluation flow. The chapter also includes an explanation of the genetic algorithm concept and phases.
It also explains the placer which is used to generate an optimal pattern for the current mirror. It explains in detail how the patterns are generated using segmented integral model and the genetic optimization used in current mirror mismatch calculation.
Chapter 3
In this chapter matched analog device router tool is explained. It also explains how the routes are generated and the constraints are considered to ensure the best matching environment.
Chapter 4
This chapter explains the procedural router needed to route an OTA of any architecture.
Chapter 5
This chapter shows practical examples where the tool has been applied and the results produced.
Chapter 6
This chapter ends the thesis by conclusions, summary and future work.
Table of Content
Chapter 1
This chapter is an introduction explaining the need for layout automation tools and the outline of this thesis.
Chapter 2
This chapter includes a survey of the latest layout automation tools, mismatch sources affecting layout design, current mirror systematic mismatch modelling, and finally the STI evaluation flow. The chapter also includes an explanation of the genetic algorithm concept and phases.
It also explains the placer which is used to generate an optimal pattern for the current mirror. It explains in detail how the patterns are generated using segmented integral model and the genetic optimization used in current mirror mismatch calculation.
Chapter 3
In this chapter matched analog device router tool is explained. It also explains how the routes are generated and the constraints are considered to ensure the best matching environment.
Chapter 4
This chapter explains the procedural router needed to route an OTA of any architecture.
Chapter 5
This chapter shows practical examples where the tool has been applied and the results produced.
Chapter 6
This chapter ends the thesis by conclusions, summary and future work.
Table of Content
Other data
| Title | Generalized Approach for Automatic Analog Layout | Other Titles | حيثية عامة للتخطيط التناظرى الآلى | Authors | Soha Sherif Samir Hamed | Issue Date | 2020 |
Attached Files
| File | Size | Format | |
|---|---|---|---|
| BB1136.pdf | 706.53 kB | Adobe PDF | View/Open |
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