FPGA BASED TELETEXT DECODER DESIGN

Abstract

This thesis deals with the use of FPGA (Field Programmable

Gate Array) in modem digital design.

Since their introduction in the late eighties , FPGA has been progressively utilized in many custom Application Specific Integrated Circuits (ASICs). The use of FPGA for realizing data processing function and Teletext based decoders is addressed in this thesis . In particular we utilize Xilinx FPGA for implementing systolic multiplier as well as carry select adder .

Moreover, the teletext acquisition part is completely implemented and realized . In, all our designs we have utilized modem CAD tools that automates many ofthc design steps, and verifies the performance of the designed systems .