New direct digital frequency synthesizer architecture for mobile transceivers
Hegazi, Emad; Ragaie, H. F.; Haddara, H.; Ghali, H.;
Abstract
A new architecture for Direct Digital Frequency Synthesizer (DDFS) with constant Oversampling Ratio (OSR) is proposed. The architecture contains no ROM block. The switching pool of the Digital to Analog Converter (DAC) is simplified allowing a 90% reduction in DAC settling time. The basic concepts of the proposed architecture are discussed and simulation results are demonstrated.
Other data
| Title | New direct digital frequency synthesizer architecture for mobile transceivers | Authors | Hegazi, Emad ; Ragaie, H. F.; Haddara, H.; Ghali, H. | Issue Date | 1-Jan-1998 | Journal | Proceedings - IEEE International Symposium on Circuits and Systems | ISSN | 02714310 | Scopus ID | 2-s2.0-0031641231 |
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