An algorithm for automatic tuning of PLLs
Hegazi, Emad;
Abstract
In this paper we propose a new method for the automatic tuning of PLLs with switched capacitor banks in their VCOs. The method is implemented on a 7 GHz 130-nm CMOS PLL with 5 binary control bits. Measurement results are provided and analysis of the method is illustrated. © 2007 IEEE.
Other data
| Title | An algorithm for automatic tuning of PLLs | Authors | Hegazi, Emad | Issue Date | 1-Jan-2007 | Journal | Proceedings - IEEE International Symposium on Circuits and Systems | ISSN | 02714310 | DOI | 10.1109/iscas.2007.378733 | Scopus ID | 2-s2.0-34548824101 |
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