Systematic design and optimization of operational transconductance amplifier using gm/ID design methodology
Sabry, Mostafa N.; Omran, Hesham; Dessouky, Mohamed;
Abstract
The simple square-law MOSFET model fails to describe the behavior of short channel and moderate/weak inversion devices. The gm/ID methodology is a promising technique that addresses the square-law shortcomings and bridges the gap between hand analysis and simulation. This paper describes a systematic procedure for the design of a single-stage operational-transconductance amplifier (OTA) using the gm/ID methodology. Both small signal and large signal specifications are used to constrain the design process, which is graphically illustrated using trade-off charts. The presented design procedure is automated using MATLAB, and an iterative procedure is used to take the OTA self-loading into consideration. Moreover, an automated optimization procedure is presented to maximize the speed of a unity-gain buffer under current consumption, DC gain, and input capacitance constraints. The designed circuits are verified using Cadence Spectre and the 180 nm Predictive Technology Model (PTM), where the simulation results are in close agreement with hand analysis and automation results.
Other data
Title | Systematic design and optimization of operational transconductance amplifier using gm/ID design methodology | Authors | Sabry, Mostafa N.; Omran, Hesham ; Dessouky, Mohamed | Keywords | Analog design automation | Analog design optimization | CMOS | gm/ID methodology | OTA design | Systematic analog design | Issue Date | 1-May-2018 | Publisher | ELSEVIER SCI LTD | Journal | Microelectronics Journal | ISSN | 00262692 | DOI | 10.1016/j.mejo.2018.02.002 | Scopus ID | 2-s2.0-85044649620 | Web of science ID | WOS:000432605900010 |
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