CU-SDAH: A PLATFORM FOR IOT HARDWARE SECURITY, SW/HW PARTITIONING, EXTENDED ALGORITHM HOPPING AND SCA RESISTANCE USING ZYNQ SOC

Abstract

Internet of things applications are being essential in every life aspects, with the critical risk of breaching the data transmission, In the current thesis, advanced optimization techniques for hardware security implementation is done and evaluated against the proposed framework with three advanced techniques, first technique is the software/hardware partitioning using the SDSoC and being implemented in the ZYNQ SoC and being compared against pure RTL implementation, second technique starts through side channel attack evaluation against AES algorithm by applying differential power analysis using chipWhisperer kit is done and critical vulnerabilities inside the S-Box of the AES algorithm is being enhanced through applying the genetic algorithms to obtain optimized security parameters for the S-Box.. third technique improves algorithm hopping by applying the partial dynamic reconfiguration proposing new security dimension along with saving the chip area.