Electrical Modeling of Interconnects in Three Dimensional Integrated Circuits

Abstract

In this thesis, we show that using the relation between the inductance matrix and the capacitance matrix in a homogeneous medium (the inverse inductance model) to extract the coupling capacitance in a through silicon via (TSV) array is inac- curate. This is because this relation assumes a lossless, homogeneous surrounding medium. We show that this model can cause an error up to 70% in the coupling capacitance compared to ANSYS Q3D extractor simulations.

Instead of using high accuracy, time consuming numerical electromagnetic tech- niques, we suggest a correction methodology for the inverse inductance model so that it can account for the non-homogeneous nature of the TSVs surrounding medium and the lossy nature of the silicon substrate.

Dimensional analysis is used to understand the correction function dependencies on TSV dimensions and to reduce the number of independent physical variables needed for regression analysis. Once the independent physical variables are re- duced to dimensionless variables, multiple regression techniques are used to esti- mate the correction function for TSV arrays. Q3D extractor simulations are used to show that the corrected model reduces the coupling capacitance error signifi- cantly. The correction function behavior vs. frequency is discussed as well.

Keywords: More than Moore, 3D-IC, 2.5D-IC, TSV