An Area Efficient NoC Physical Layer

Abstract

In this thesis, the RTL design and implementation details of a complete NoC system will be presented. The NoC is a mesh-topology based, its routers employ worm-hole switching, XY-routing algorithm and round-robin arbitration, and the interfaces implement the CTC end-to-end flow control protocol. The NoC implementation is done using 40nm CMOS technology. The thesis is divided into six chapters and lists of contents, tables, and figures as well as the bibliography and three appendices. Chapter One: In this chapter, we give a brief introduction to the thesis and the research area of interest. Chapter Two: In this chapter, the Networks-On-Chip concept is introduced, and its advantages, disadvantages, and implementation challenges are highlighted. It also presents the literature survey of different NoC interfaces implementation and different end-to-end flow control protocols. Chapter Three: This chapter explains the end-to-end flow control in NoC and it goes through the CTC protocol specification and shows its main differences with respect to the normal CB protocol. Chapter Four: This chapter demonstrates all the design details of a basic mesh-topology NoC using HDL and explains the construction of its verification environment. It also shows the design details of the network interfaces, implementing CTC and CB end-to-end flow control protocols. Chapter Five: In this chapter, the NoC performance is evaluated using NoC standard traffic patterns, where the CTC performance is compared against normal CB protocol performance. This chapter also introduces the post-synthesis implementation results of the NoC implementing CTC and CB protocols, in 40nm TSMC CMOS technology. Finally, the area-saving results are presented. Chapter Six: This chapter ends the thesis by conclusions, summary and future