Clock and Data Recovery for High Speed Serial Links
Amr Ahmed Ali Elshazly;
Abstract
This thesis demonstrates the design of a Clock and Data Recovery circuit (CDR) used in the High Speed serial link transceivers for multi-standard systems. The thesis presents different implementations of CDR circuits, It demonstrates the theory of the se
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| Title | Clock and Data Recovery for High Speed Serial Links | Authors | Amr Ahmed Ali Elshazly | Keywords | Clock and Data Recovery for High Speed Serial Links | Issue Date | 2007 | Description | This thesis demonstrates the design of a Clock and Data Recovery circuit (CDR) used in the High Speed serial link transceivers for multi-standard systems. The thesis presents different implementations of CDR circuits, It demonstrates the theory of the se |
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