AID Converter Realization using the Single Election Transistor-

Abstract

The present work suggests two techniques for the realization of Multi-bit Analog-to-Digital Converters and Digital-to-Analog Converters using the Single-Electron Transistor (SET) which is the future of LSI technology because of its ultra small size, ultra-low power and high density.

The architecture of an Analog-to-Digital converter (ADC) was

implemented using two different techniques:

1. The first technique, can be described as a PSF (Periodic Symmetric Functions) and this makes it an ideal candidate for ADC compact implementations. Based on this PSF structure, a novel ADC architecture that requires a capacitive divider (built with 2 n -2 capacitors) and n PSFs (built with 2 n SETs) has been proposed for an n -bit ADC impleineptation. Using this scheme, a 4-bit ADC is simulated at lOK by SIMON2 (simulator for Single­ Electron Tunneling devices and circuits by C. Wasshuber) and some noise was I found in the output signal, then by modifying the parameters the digital output signal was enhanced. A 4-bit ADC was expanded to 5-bit ADC, 6-bit ADC and

8-bit ADC.