Radio Frequency Power Amplifiers for Software Defined Radio

Abstract

Power amplifiers (PA) for modern wireless communications standards typically state non-constant amplitude modulation schemes to use the constricted frequency spectrum author efficiently and large bandwidths to meet the claim for higher data rates. Not with standing, to forgather the spectral and modulation requirements, highly additive PAs are required. With the reinforced intensify of CMOS transistors, highly effective switched PAs, such as class-D and class-E, feature gained accrued occupy in polar modulation and out phasing, Transmitters for high rate data communications (e.g. WiFi and WiMAX) need to simultaneously meet multiple conflicting requirements: high output power, efficiency and PAPR (Peak to Average Power Ratio). Out phasing is the used technique for realizing such PAs in low-cost, digital CMOS. The improvement in low-cost complementary metal-oxide-semiconductor (CMOS) technology has made it a normal option for radio frequency (RF) transceivers in wireless applications. Its advance has enabled the integration of baseband and different functional blocks. CMOS technology will be the farthest feasible solution for full integration on a single die, decrease package form factors and their costs. In addition, CMOS technology supply good thermal characteristics and a low-cost advantage paid to its matured process technology as well as a high level of integration. However, still CMOS power amplifiers (PAs) design is a challenging task for full integration. Although some efforts for full integration have been reported, they are only for PAs with low output power. High-efficiency performance is one of the utmost important requirements of power amplifiers (PAs) for wireless applications. However, the design of highly efficient CMOS PAs for watt-level applications is a challenging task. This dissertation focuses on the development of the design method for highly efficient CMOS PAs to overcome the fundamental difficulties presented by CMOS technology. Although the demands for the design of high efficiency switching PAs have quickly increased through the last decade, their implementations using CMOS technology are highly challenging tasks for wireless applications because of soft breakdown voltage and lossy substrate. This dissertation consists of two contributions for fully integrated highly efficient watt-level switching CMOS PAs. The voltage-mode Class-D amplifier is one in which the output transistors are turn on as switches. The produced voltage waveform is forward to a series resonator which offers high impedance at all frequencies excepting the resonant frequency, consequently removing the out-of-band signals. Since the two transistors are turned on and off alternately, a voltage-mode class-D amplifier can be border as a voltage controlled voltage source, which run efficiently when supply a series resonator. This high efficiency characteristic, can be preserve even if driven by non-periodic digital signals, so long as the adverse currents appearing in this situation can be provided by the active devices or parallel diodes during the ON-state. The output power of CMOS class-D RF PAs has, pending lately, been lower than +30 dBm. To realize higher output power, either low load impedance or a high supply voltage can be applied to obtain high voltage swing, i.e. a high impedance transformation ratio, is necessary. Using a high impedance transformation ratio can outcome in low efficiency, particularly with on-chip matching networks, and bandwidth reduction.