CMOS LTE Transmitter Front-End

Abstract

Recently, the necessity for low cost, low power and small size wireless transceivers has been increased expressively with the wide researches in transceiver architectures and RF circuit design techniques using CMOS technology. Long Term Evolution (LTE) is commonly identified as the fourth generation (4G) of wireless communication systems. The LTE standard takes the advantage of the multi-carrier modulation scheme Orthogonal Frequency-Division Multiplexing (OFDM) to rise the spectral efficiency, which demands high degree of linearity because of the variable signal envelope. LTE supports both Frequency Division Duplex (FDD) and Time Division Duplex (TDD) techniques with the wide range of frequency band from 0.4GHz to 4 GHz in addition to a wide number of channel bandwidth that allocated from 1.4 MHz to 20 MHz. This thesis presents the design and implementation of an RF front-end transmitter in UMC 130nm CMOS technology intended for LTE applications. The proposed transmitter is composed of LC voltage-controlled oscillator (VCO), up-conversion mixer, and power amplifier (PA). The LC VCO is based on differential structure with cross-coupled NMOS transistors to achieve low phase noise and low power dissipation. Gilbert-mixer is adopted in this work because of its high conversion gain, good linearity, and good isolation at the cost of a small growth in the noise figure (NF) and the power consumption. In addition, a low-power consumption PA design is introduced in this thesis. The proposed PA consists of two stages, driver stage and power stage. The power stage uses a pre-distortion linearizer to improve the linearity. The implemented transmitter provides a saturated output power of 23.1dBm with a maximum power gain of 29.6 dB, a 21.5 dBm output 1-dB compression point, and a power dissipation of 172.5mw satisfying the requirements on LTE front end. In addition, a physical layout for the complete transmitter circuit is provided in this thesis with total area equals 0.775mm*0.7mm.