Study of Adiabatic Digital Circuits

Abstract

Adiabatic switching is a promising approach to the realization of circuits with extremely low energy dissipation circuit. In adiabatic logic families, energy dissipation is kept low by steering currents across devices with low voltage drop and recycling any undissipated energy stored in capacitors. In this thesis we study the adiabatic digital circuits for low energy design using the principles of adiabatic switching. A modified version of diode-based quasi-adiabatic logic by using schottky diode was presented. A full adder circuit is designed by ADL, QSERL, 2N-2N2D and CMOS logic. Our simulation shows that energy saving in ADL, QSERL and 2N• 2N2D at 100 MHz is 55.7%, 33% and 44.6% respectively. When we replace each diode in previous circuit with schottky diode the energy saving increases considerably and become 67%, 66%and 65.31% for the previous circuits in respectively. A new logic family CTAL was presented. For 2-stage inverters, CTAL energy saving was about 98% in comparison with the CMOS one. To evaluate the perfonnance of CTAL logic family. We compare energy dissipation for different operating frequencies between our CTAL adder and 2- bit ripple carry adder implemented in 2N-2P, PAL, ADCPL and CMOS families. PAL has the lowest energy dissipation for low operating frequencies but stops working at 100MHz. CTAL dissipates less energy than any other logic family for frequencies above 100MHz. At 200 MHz, CTAL is about 6 times more energy -• efficient than static CMOS, about 2 times more energy efficient than 2n-2p and 1.6 times more energy efficient than ADCPL. Adiabatic techniques applications will be beneficial in areas such as: hand-held / wearable / portable devices, implanted medical devices, and spacebome systems.