Design and FPGA implementation of advanced encryption standard تصميم وتحقيق طريقه التشفير القياسيه باستخدام مصفوفه البوابات المبرمجه حقليا
Riham Abdel Latif Abou Hogail;
Abstract
This thesis describes a high performance single-chip field programmable gate array (FPGA) implementation of the advanced encryption standard (AES) algorithm with 128-bit data block, and 128, 192 and 256 key block, using resource sharing between encryption
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| Title | Design and FPGA implementation of advanced encryption standard تصميم وتحقيق طريقه التشفير القياسيه باستخدام مصفوفه البوابات المبرمجه حقليا | Authors | Riham Abdel Latif Abou Hogail | Keywords | Design and FPGA implementation of advanced encryption standard تصميم وتحقيق طريقه التشفير القياسيه باستخدام مصفوفه البوابات المبرمجه حقليا | Issue Date | 2004 | Description | This thesis describes a high performance single-chip field programmable gate array (FPGA) implementation of the advanced encryption standard (AES) algorithm with 128-bit data block, and 128, 192 and 256 key block, using resource sharing between encryption |
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