An embedded hardware architecture for GPC-on-Chip applied to automotive active suspension systems

Shoukry, Yasser; El-Kharashi, M. Watheq; Shokry, Hesham; hammad, sherif;

Abstract


This paper presents a hardware architecture for an embedded real-time generalized predictive control (GPC) algorithm based on the state-of-the-art Customizable Advanced Processor (CAP9) technology from Atmel; targeting automotive active suspension systems. The GPC algorithm relies on the solution of an optimization problem at every sampling period. Profiling shows that matrix operations consume the largest portion of the computation requirements of the algorithm. The proposed embedded system utilizes a systolic-array based matrix co-processor in order to accelerate matrix operations. The proposed embedded system is designed to fit within the proposed platform while meeting tight real-time constraints imposed by the automotive active suspension systems. © 2011 IEEE.


Other data

Title An embedded hardware architecture for GPC-on-Chip applied to automotive active suspension systems
Authors Shoukry, Yasser; El-Kharashi, M. Watheq; Shokry, Hesham; hammad, sherif 
Keywords Active suspension systems | embedded control systems | generalized predictive control | software-hardware codesign
Issue Date 11-Jul-2011
Journal Saudi International Electronics Communications and Photonics Conference 2011 Siecpc 2011 
ISBN [9781457700699]
DOI 10.1109/SIECPC.2011.5876912
Scopus ID 2-s2.0-79959955233

Recommend this item

Similar Items from Core Recommender Database

Google ScholarTM

Check



Items in Ain Shams Scholar are protected by copyright, with all rights reserved, unless otherwise indicated.